1. Field of the Invention
The present invention relates in general to an on-chip latch-up protection circuit. In particular, the present invention relates to an on-chip latch-up protection circuit detecting and terminating a latch-up.
2. Description of the Related Art
A complementary metal-oxide-semiconductor (CMOS) circuit in an integrated circuit (IC) of a semiconductor chip is at least formed by a positive-type metal-oxide-semiconductor field-effect-transistor (PMOSFET) and negative-type metal-oxide-semiconductor field-effect-transistor (NMOSFET). As known in the art, a silicon-controlled rectifier (SCR) with a PNPN structure is consequently formed by the combination of a parasitic PNP bipolar-junction transistor (BJT) under the PMOS and a parasitic NPN BJT under the NMOS. When triggered, the SCR allows a large current to flow through due to its low turn-on resistance and low holding voltage. Unless the voltage across or provided to a triggered SCR is smaller than the holding voltage or the current through the SCR is limited to a certain low level, the SCR will be constantly “locked” to consume a lot of powers. Such an event is named as latch-up, which is well-known in the art.
A number of methods have being used for preventing latch-up. Guard rings in a layout, minimum distance requirement between PMOSs and NMOSs, or epitaxy or retrograde well formation in a manufacturing process for reducing spread resistance of wells are examples of methods used for increasing triggering voltages of SCRs and preventing latch-up. A clamping circuit formed by Zener diodes is proposed in U.S. Pat. No. 5,347,185 to expect that the voltage difference between power lines are less then the trigger voltage of an SCR and latch-up can be hopefully avoided. However, transient current and noises occur during normal operations may also cause triggering of SCRs. Once a SCR is triggered, latch-up cannot be stopped until power supply is switched off manually when utilizing the methods described above.
In U.S. Pat. Nos. 5,212,616 and 5,379,174, voltage or current provided to a circuit can automatically be cut off when latch-up is detected. After a predetermined period of time, voltage or current can be supplied to the circuit again. However, voltage across a subjected circuit is used as a detected reference for latch-up protection in both patents.